Analysis of Bipolar Integrated Circuit Degradation Mechanisms Against Combined TID–DD Effects

Integrated circuits sensitive to both total ionizing dose (TID) and displacement damage (DD) effects can exhibit degradation profiles resulting from a combination of mechanisms induced by effects. This work presents circuit simulations based on experimental data explain combined TID DD bipolar IC current source. First, the effect each internal transistor circuit's response is evaluated applying electrical parametric changes. Then are performed different scenarios observed behaviors reproduce TID, DD, TID-DD responses. These show that synergistic interaction between leakage located in bandgap reference part with gain mirror appears be responsible for response. It also shown rate depends DDD/TID ratios encountered during exposition.